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LE50A Very low drop voltage regulators with inhibit complementary power mosfet

Categories Power Mosfet Transistor
Brand Name: STMICROELECTRONICS
Model Number: LE50A
Certification: Original Factory Pack
Place of Origin: Thailand
MOQ: 100pcs
Price: Negotiation
Payment Terms: T/T, Western Union,PayPal
Supply Ability: 5200PCS
Delivery Time: 1 Day
Packaging Details: please contact me for details
DC input voltage: 20 V
Output current: Internally limited (1)
Power dissipation: Internally limited
Storage temperature range: 65 to 150 °C
Operating junction temperature range: -40 to 125 °C
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LE50A Very low drop voltage regulators with inhibit complementary power mosfet

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LE50A

Very low drop voltage regulators with inhibit complementary power mosfet

Features

■ Very low dropout voltage (0.2 V typ)

■ Very low quiescent current (typ. 50 µA in OFF MODE, 0.5 mA in ON MODE, no load)

■ Output current up to 100 mA

■ Output voltages of 2.5; 2.7; 3; 3.3; 3.5; 4; 4.5; 4.7; 5; 8 V ■ Internal current and thermal limit

■ Only 2.2 µF for stability

■ Available in ± 1 % (A) or ± 2 % (C) selection at 25 °C

■ Supply voltage rejection: 80 dB (typ.)

■ Temperature range: -40 to 125 °C


Description

The LExxAB and LExxC are very low drop voltage regulators available in SO-8 and TO-92 packages and in a wide range of output voltages.


The very low drop voltage (0.2 V) and the very low quiescent current make them particularly suitable for low noise low power applications and specially in battery powered systems.


They are pin to pin compatible with the older L78Lxx series. Furthermore in the 8 pin configuration (SO-8) they employ a shutdown logic control (pin 5, TTL compatible). This means that when the device is used as a local regulator, it’s possible to put in stand by a part of the board even more decreasing the total power consumption. In the three terminal configuration (TO-92) the device is even in ON STATE, maintaining the same electrical performances. It needs only 2.2 µF capacitor for stability allowing room and cost saving effect.


Pin configuration


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